Request for Help Creating a Working Custom EDID (1440p / 144 Hz / HDMI 2.1 / FreeSync

[joe1121]

(04-07-2026 07:45 PM)MUC Wrote:  

(04-07-2026 08:38 AM)joe1121 Wrote:  I’m still unable to inject it into the fuser (DICHEN 6th Gen Fuser with HDMI interface).

You mentioned HDMI 2.1 above. That's why I generated a 512-byte EDID.

However, as I understand it, the DICHEN 6 Gen Fuser is an HDMI 2.0 device. This means it only processes the TMDS protocol and therefore likely only needs a 256-byte EDID without a DisplayID.

1440p @ 144 Hz is not possible with CVT-RB over HDMI TMDS. The Samsung EDID likely works because the pixel clock is below 600 MHz. Did you choose this video timing yourself, or is this the original data from the Samsung monitor when "HDMI: 144 Hz" is selected under "Refresh Rate" in the On Screen Display menu?

Anyway. Attached you'll find another file. It differs from the one above in that the DisplayID block has been removed and the Samsung video timing has been incorporated into the base block. The HDMI 2.1 FRL capability has also been removed. Everything else is still Gigabyte AORUS FO27Q3, including FreeSync (capped at 144 Hz).

1440p @ 144 Hz with 580 MHz pixel clock:
Front porch: 8 / 3
Sync width: 64 / 5
Back porch: 88 / 33
Sync polarity: + / -

580 MHz TMDS is 97% of HDMI 2.0 which means HDR will only be 8-bit.

Using EDID_Gigabyte_AORUS_FO27Q3_TMDS_MUC05.bin, the display functions correctly until VRR is enabled in AMD Adrenalin. When launching a game with VRR active, the monitor continuously loses signal and cycles back to “HDMI 1 input”.

[MUC]

(Yesterday 08:19 AM)joe1121 Wrote:  the display functions correctly until VRR is enabled in AMD Adrenalin. When launching a game with VRR active, the monitor continuously loses signal and cycles back to “HDMI 1 input”.

The DICHEN 6 Gen Fuser uses an AMD ZynQ 7020 FPGA chip to overlay two independent video signals in real time with pixel-perfect accuracy. This requires identical video timings from both inputs. Variable refresh rates (also known as AdaptiveSync, G-Sync, FreeSync, or HDMI VRR) work by using varying vertical blanking intervals by the graphics card. Using the TMDS protocol, this results in an unpredictable change in the pixel clock, causing a loss of HDMI sync between the two signals.

Therefore, using variable refresh rates with this or any other fuser is not possible. If the FPGA had to receive signals with constantly varying refresh rates and synchronize them before output, this processing would significantly increase the latency of the output signal, negating the fuser's purpose for gaming.

[joe1121]

(Yesterday 07:39 PM)MUC Wrote:  

(Yesterday 08:19 AM)joe1121 Wrote:  the display functions correctly until VRR is enabled in AMD Adrenalin. When launching a game with VRR active, the monitor continuously loses signal and cycles back to “HDMI 1 input”.

The DICHEN 6 Gen Fuser uses an AMD ZynQ 7020 FPGA chip to overlay two independent video signals in real time with pixel-perfect accuracy. This requires identical video timings from both inputs. Variable refresh rates (also known as AdaptiveSync, G-Sync, FreeSync, or HDMI VRR) work by using varying vertical blanking intervals by the graphics card. Using the TMDS protocol, this results in an unpredictable change in the pixel clock, causing a loss of HDMI sync between the two signals.

Therefore, using variable refresh rates with this or any other fuser is not possible. If the FPGA had to receive signals with constantly varying refresh rates and synchronize them before output, this processing would significantly increase the latency of the output signal, negating the fuser's purpose for gaming.

Hey, that makes a lot of sense—thanks so much for explaining it. I really appreciate your support and the effort you’ve put in.